-------------------------------------------------------- | | | NanoSim Version G-2012.06 (RHEL64) | | Copyright (c) 2012 Synopsys Inc., All Rights Reserved. | | | -------------------------------------------------------- Built by nsmgr on Fri May 18 18:17:12 PDT 2012 Mon Jun 24 20:08:15 EDT 2013 Machine Name: parsnip Command line options: -n sse_s_hw_0_hd_0_hwVal_0_hdVal_0-gate_K0_I1000.sp -o sse_s_hw_0_hd_0_hwVal_0_hdVal_0-gate_K0_I1000 -c sse_s_hw_0_hd_0_hwVal_0_hdVal_0-gate_K0_I1000.cfg The 64-bit version of the simulator is running. Initializing system messages took 0.010 s LICENSE Information: -- Key: TIMEMILL__NSADDON -- Version: 2012.06 Installing interactive/configuration commands ... Installing commands took 0.010 s Start netlist compilation at Mon Jun 24 20:08:16 2013 Compiling "sse_s_hw_0_hd_0_hwVal_0_hdVal_0-gate_K0_I1000.sp" (SPICE) Compiling "/home/borowcm/libraries/saed90nm.cdl" (SPICE) Compiling "/home/borowcm/libraries/SAED90nm.lib" (SPICE) Compiling "/home/borowcm/libraries/SAED90nm.lib" (SPICE) Compiling "sse_s_hw_0_hd_0_hwVal_0_hdVal_0-gate_K0_I1000_stim.sp" (SPICE) Parsing netlist finished in 0 seconds Default circuit temperature : 25.000 Netlist compilation will be case insensitive. All letters will be converted to lower case. Building instance tree finished in 0 seconds Finish netlist compilation at Mon Jun 24 20:08:16 2013 Netlist compilation took 0.150 s NOTICE:Techfile Voltage (*nanosim tech="voltage") set to 1.2V ... This simulation uses HSPICE models WARNING:NanoSim:0x21104432:MISC MODEL PROBLEM: ** warning** associated with encrypted blocks were suppressed Building node/element arrays took 1.620 s Reading configuration files ... Reading configuration files took 0.000000 s WARNING:NanoSim:0x21108427:Output current waveform sampling resolution (= 1e-15 A) is smaller than the simulation current resolution (= 1e-12 A). # of CMOS elements : 1722 # of resistors : 1 # of dc voltage sources : 2 # of independent sources : 9 # of current controlled current sources : 1 # of elements : 1735 # of used elements : 1734 # of nodes : 880 # of subckt : 342 # of top-level instances : 234 # of capacitors from netlist : 1 # of Ground CAPS from netlist : 1 # of Coupling CAPS from netlist : 0 Circuit partitioning ... Among 1 stages, there are: 0 pwl stages 0 grouped pwl stages 1 analog stages 0 NR stages 0 grouped analog stages 0 rc stages 0 ud stages 0 ADFMI functional model stages 868 nodes in the largest pwl stage 0 nodes in the largest digital stage 1 stages (1 PWL stages) with 850-899 nodes Among 880 nodes, there are: 0 pwl nodes 0 analog (accurate) nodes 880 rc nodes 0 ud nodes 0 cut nodes 0 mem_cut nodes 868 no_clamp nodes 868 nodes in stages 12 voltage source nodes 3 constant nodes 0 NR nodes Among 1735 elements, there are: 1725 elements in stages 1725 pwl elements 0 synchronous elements 0 SMS elements 0 analog (accurate) elements 0 rc elements 0 ud elements 0 ADFMI functional model elements 0 VERILOGA model elements 0 behavioral model elements 1725 mna elements 0 NR elements 0 mos transistors identified as keepers 1722 mos transistors need Subthreshold current 0 keepers removed 0 keepers reduced Circuit partitioning took 0.000 s Constructing matrix ... Matrix ordering and construction took 0.000 s After reading configuration file(s), 1 signals are identified to be printed: 1 element branch current signals, including: 1 element branch inst. current signals Statistics of memory used for signal printing: 437928 bytes allocated in total, including: 160000 bytes allocated additionally for node current signals 277928 bytes allocated additionally for element branch current signals Levelizing stages ... Levelizing stages took 0.000 s DC initialization ... WARNING:NanoSim:0x2110e526:Element xu109.mmp1 outside tech_file range (vg=-0.8, vd=0.8, vs=1.2)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xu118.mmp4 outside tech_file range (vg=0.8, vd=-0.8, vs=1.2)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xu118.mmp3 outside tech_file range (vg=-0.8, vd=0.8, vs=1.2)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xu118.mmp2 outside tech_file range (vg=-0.8, vd=-0.8, vs=0.8)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xu118.mmp1 outside tech_file range (vg=0.8, vd=-0.8, vs=1.2)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xu20.mmp3 outside tech_file range (vg=-0.8, vd=0.8, vs=1.2)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xu20.mmp1 outside tech_file range (vg=0.8, vd=-0.8, vs=1.2)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xu20.mmp2 outside tech_file range (vg=0.8, vd=-0.8, vs=1.2)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xu12.mmp2 outside tech_file range (vg=-0.8, vd=0.8, vs=1.2)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xu116.mmp1 outside tech_file range (vg=0.011959, vd=-0.8, vs=1.2)... at 0ns WARNING:NanoSim:0x20102001:Previous message has been printed 10 times, It will not be printed again! To change the limit for every message type, use: "set_mesg_opt limit_per_mesg=" WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x20102001:Previous message has been printed 10 times, It will not be printed again! To change the limit for every message type, use: "set_mesg_opt limit_per_mesg=" Finishing initialization (level 0 -- 0) 1 dynamic stages assigned in DC Initialization Number of residual dc events scheduled : 0 Number of ic nodes scheduled : 0 DC initialization took 0.460 s Simulation begins in pwl mode ... WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xu31.mmn6, vbs=0.460662... at 20ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xnextstate_reg[2].mmn7, vbs=0.459927... at 20.21ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xnextstate_reg[2].mmn4, vbs=0.459927... at 20.21ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xstate_reg[3].mmn4, vbs=0.596085... at 20.27ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xstate_reg[3].mmn6, vbs=0.596085... at 20.27ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xu82.mmn2, vbs=0.603042... at 25.03ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xu82.mmn1, vbs=0.603042... at 25.03ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xu126.mmn3, vbs=0.488671... at 25.06ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xu126.mmn2, vbs=0.488671... at 25.06ns WARNING:NanoSim:0x2110f525:Negative bulk-source bias: element xu31.mmp5, vbs=-0.429872... at 25.09ns WARNING:NanoSim:0x2110f525:Negative bulk-source bias: element xu31.mmp4, vbs=-0.429872... at 25.09ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xu45.mmn3, vbs=0.668347... at 25.12ns WARNING:NanoSim:0x20102001:Previous message has been printed 10 times, It will not be printed again! To change the limit for every message type, use: "set_mesg_opt limit_per_mesg=" WARNING:NanoSim:0x2110f525:Negative bulk-source bias: element xc1467.mmp5, vbs=-0.473384... at 30.03ns WARNING:NanoSim:0x2110f525:Negative bulk-source bias: element xstate_reg[1].mmp10, vbs=-0.417127... at 40ns WARNING:NanoSim:0x2110f525:Negative bulk-source bias: element xstate_reg[1].mmp12, vbs=-0.417127... at 40ns WARNING:NanoSim:0x2110f525:Negative bulk-source bias: element xstate_reg[2].mmp10, vbs=-0.417127... at 40ns WARNING:NanoSim:0x2110f525:Negative bulk-source bias: element xstate_reg[2].mmp12, vbs=-0.417127... at 40ns WARNING:NanoSim:0x2110f525:Negative bulk-source bias: element xstate_reg[0].mmp10, vbs=-0.417127... at 40ns WARNING:NanoSim:0x2110f525:Negative bulk-source bias: element xstate_reg[0].mmp12, vbs=-0.417127... at 40ns WARNING:NanoSim:0x2110f525:Negative bulk-source bias: element xc1819.mmp1, vbs=-0.764915... at 49.99ns WARNING:NanoSim:0x20102001:Previous message has been printed 10 times, It will not be printed again! To change the limit for every message type, use: "set_mesg_opt limit_per_mesg=" Simulation ends at 10040.000 ns Simulation took 587.790 s Current information calculated over the intervals: 0.00000e+00 - 1.00400e+04 ns Simulation time resolution : 1.000e-02 ns Print time resolution : 1.000e-02 ns Number of PWL matrix solutions : 319255 Number of PWL MOS model lookups : 195816718 Number of time steps : 318999 Number of iterations : 0 Number of rejected time steps : 36229 Global simulation parameters used: SPD 0.18V ASPD 0.06V SIM_DESV 0.18V SIM_AESV 0.06V VDS_MIN 8.75249e-11V AVDS_MIN 8.75249e-11V SSC (steady state current) 1e-07uA SUBI (subthreshold current) 1e-06uA DC CURRENT 1e-06uA 1183.0 real 590.5 user 0.2 sys Signal data is saved in sse_s_hw_0_hd_0_hwVal_0_hdVal_0-gate_K0_I1000.out No errors reported in the .err file (sse_s_hw_0_hd_0_hwVal_0_hdVal_0-gate_K0_I1000.err)