-------------------------------------------------------- | | | NanoSim Version G-2012.06 (RHEL64) | | Copyright (c) 2012 Synopsys Inc., All Rights Reserved. | | | -------------------------------------------------------- Built by nsmgr on Fri May 18 18:17:12 PDT 2012 Wed Nov 14 13:36:00 EST 2012 Machine Name: linux-test-64bit Command line options: -n EXPWO_K0_I500.sp -o EXPWO_K0_I500 -c EXPWO_K0_I500.cfg The 64-bit version of the simulator is running. Initializing system messages took 0.000 s LICENSE Information: -- Key: TIMEMILL__NSADDON -- Version: 2012.06 Installing interactive/configuration commands ... Installing commands took 0.010 s Start netlist compilation at Wed Nov 14 13:36:01 2012 Compiling "EXPWO_K0_I500.sp" (SPICE) Compiling "/home/borowcm/libraries/saed90nm.cdl" (SPICE) Compiling "/home/borowcm/libraries/SAED90nm.lib" (SPICE) Compiling "/home/borowcm/libraries/SAED90nm.lib" (SPICE) Compiling "EXPWO_K0_I500_stim.sp" (SPICE) Parsing netlist finished in 0 seconds Default circuit temperature : 25.000 Netlist compilation will be case insensitive. All letters will be converted to lower case. Building instance tree finished in 0 seconds Finish netlist compilation at Wed Nov 14 13:36:01 2012 Netlist compilation took 0.100 s NOTICE:Techfile Voltage (*nanosim tech="voltage") set to 1.2V ... This simulation uses HSPICE models WARNING:NanoSim:0x21104432:MISC MODEL PROBLEM: ** warning** associated with encrypted blocks were suppressed Building node/element arrays took 3.010 s Reading configuration files ... Reading configuration files took 0.000000 s WARNING:NanoSim:0x21108427:Output current waveform sampling resolution (= 1e-15 A) is smaller than the simulation current resolution (= 1e-12 A). # of CMOS elements : 122 # of resistors : 1 # of dc voltage sources : 2 # of independent sources : 3 # of current controlled current sources : 1 # of elements : 129 # of used elements : 128 # of nodes : 64 # of subckt : 342 # of top-level instances : 26 # of capacitors from netlist : 1 # of Ground CAPS from netlist : 1 # of Coupling CAPS from netlist : 0 Circuit partitioning ... Among 1 stages, there are: 0 pwl stages 0 grouped pwl stages 1 analog stages 0 NR stages 0 grouped analog stages 0 rc stages 0 ud stages 0 ADFMI functional model stages 58 nodes in the largest pwl stage 0 nodes in the largest digital stage 1 stages (1 pwl/analog stages) with 50-99 nodes Among 64 nodes, there are: 6 pwl nodes 58 analog (accurate) nodes 0 rc nodes 0 ud nodes 0 cut nodes 0 mem_cut nodes 64 no_clamp nodes 58 nodes in stages 6 voltage source nodes 3 constant nodes 0 NR nodes Among 129 elements, there are: 125 elements in stages 3 pwl elements 8 pwl+ elements 0 synchronous elements 0 SMS elements 114 analog (accurate) elements 0 rc elements 0 ud elements 0 ADFMI functional model elements 0 VERILOGA model elements 0 behavioral model elements 125 mna elements 0 NR elements 0 mos transistors identified as keepers 122 mos transistors need Subthreshold current 0 keepers removed 0 keepers reduced Circuit partitioning took 0.000 s Constructing matrix ... Matrix ordering and construction took 0.000 s After reading configuration file(s), 1 signals are identified to be printed: 1 element branch current signals, including: 1 element branch inst. current signals Statistics of memory used for signal printing: 425080 bytes allocated in total, including: 160000 bytes allocated additionally for node current signals 265080 bytes allocated additionally for element branch current signals Levelizing stages ... Levelizing stages took 0.000 s DC initialization ... WARNING:NanoSim:0x2110e526:Element xu11.mmp4 outside tech_file range (vg=-0.442591, vd=1.2, vs=1.6)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xu11.mmp3 outside tech_file range (vg=-0.19896, vd=1.2, vs=1.6)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xu14.mmp2 outside tech_file range (vg=-0.19896, vd=1.2, vs=1.6)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xu16.mmp4 outside tech_file range (vg=-0.19896, vd=0, vs=1.6)... at 0ns WARNING:NanoSim:0x2110e526:Element xu16.mmp4 outside tech_file range (vg=-0.19896, vd=0, vs=1.6)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xu16.mmp3 outside tech_file range (vg=-0.442591, vd=1.2, vs=1.6)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xu8.mmn4 outside tech_file range (vg=0, vd=1.6, vs=0.0672376)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xu15.mmn4 outside tech_file range (vg=-0.19896, vd=1.6, vs=0.0425069)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xu15.mmp4 outside tech_file range (vg=-0.19896, vd=1.2, vs=1.6)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xu6.mmp1 outside tech_file range (vg=0.935423, vd=0.0947043, vs=1.6)... at 0ns WARNING:NanoSim:0x20102001:Previous message has been printed 10 times, It will not be printed again! To change the limit for every message type, use: "set_mesg_opt limit_per_mesg=" WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x20102001:Previous message has been printed 10 times, It will not be printed again! To change the limit for every message type, use: "set_mesg_opt limit_per_mesg=" Finishing initialization (level 0 -- 0) 0 dynamic stages assigned in DC Initialization Number of residual dc events scheduled : 0 Number of ic nodes scheduled : 0 DC initialization took 0.010 s Simulation begins in pwl mode ... WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xstate_reg[0].mmn11, vbs=0.547073... at 19.98ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xstate_reg[0].mmn12, vbs=0.547073... at 19.98ns WARNING:NanoSim:0x2110f526:Element xstate_reg[0].mmn12 outside tech_file range (vg=-0.00361918, vd=1.23837, vs=-0.547073)... at 19.98ns WARNING:NanoSim:0x2110f5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xu8.mmn3, vbs=0.521913... at 129.98ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xu8.mmn4, vbs=0.521913... at 129.98ns WARNING:NanoSim:0x2110f526:Element xu8.mmn4 outside tech_file range (vg=-0.00223387, vd=1.1764, vs=-0.521913)... at 129.98ns WARNING:NanoSim:0x2110f5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xu5.mmn3, vbs=0.521522... at 129.98ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xu5.mmn4, vbs=0.521522... at 129.98ns WARNING:NanoSim:0x2110f526:Element xu5.mmn4 outside tech_file range (vg=-0.00296738, vd=1.22519, vs=-0.521522)... at 129.98ns WARNING:NanoSim:0x2110f5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110f526:Element xu8.mmn4 outside tech_file range (vg=-0.00161022, vd=1.17671, vs=-0.355452)... at 199.98ns WARNING:NanoSim:0x2110f5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110f526:Element xu5.mmn4 outside tech_file range (vg=-0.00197965, vd=1.22601, vs=-0.355427)... at 199.98ns WARNING:NanoSim:0x2110f5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110f526:Element xu8.mmn4 outside tech_file range (vg=-0.00161022, vd=1.17671, vs=-0.355452)... at 229.98ns WARNING:NanoSim:0x2110f5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110f526:Element xu5.mmn4 outside tech_file range (vg=-0.00197965, vd=1.22601, vs=-0.355427)... at 229.98ns WARNING:NanoSim:0x2110f5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110f526:Element xu8.mmn4 outside tech_file range (vg=-0.00151164, vd=1.17676, vs=-0.319713)... at 309.98ns WARNING:NanoSim:0x2110f5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110f526:Element xu5.mmn4 outside tech_file range (vg=-0.00182697, vd=1.22614, vs=-0.31936)... at 309.98ns WARNING:NanoSim:0x2110f5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110f526:Element xu8.mmn4 outside tech_file range (vg=-0.00151164, vd=1.17676, vs=-0.319713)... at 359.98ns WARNING:NanoSim:0x20102001:Previous message has been printed 10 times, It will not be printed again! To change the limit for every message type, use: "set_mesg_opt limit_per_mesg=" WARNING:NanoSim:0x2110f5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x20102001:Previous message has been printed 10 times, It will not be printed again! To change the limit for every message type, use: "set_mesg_opt limit_per_mesg=" Simulation ends at 5040.000 ns Simulation took 3.510 s Current information calculated over the intervals: 0.00000e+00 - 5.04001e+03 ns Simulation time resolution : 1.000e-02 ns Print time resolution : 1.000e-02 ns Number of PWL matrix solutions : 27652 Number of PWL MOS model lookups : 3306708 Number of time steps : 27581 Number of iterations : 0 Number of rejected time steps : 1503 Global simulation parameters used: SPD 0.06V ASPD 0.024V SIM_DESV 0.06V SIM_AESV 0.024V VDS_MIN 1.00182e-10V AVDS_MIN 1.00182e-10V SSC (steady state current) 1e-07uA SUBI (subthreshold current) 1e-06uA DC CURRENT 1e-06uA 8.0 real 7.1 user 0.1 sys Signal data is saved in EXPWO_K0_I500.out No errors reported in the .err file (EXPWO_K0_I500.err)