-------------------------------------------------------- | | | NanoSim Version G-2012.06 (RHEL64) | | Copyright (c) 2012 Synopsys Inc., All Rights Reserved. | | | -------------------------------------------------------- Built by nsmgr on Fri May 18 18:17:12 PDT 2012 Mon Nov 12 22:04:11 EST 2012 Machine Name: linux-test-64bit Command line options: -n onehotFSM_K0_I50.sp -o onehotFSM_K0_I50 -c onehotFSM_K0_I50.cfg The 64-bit version of the simulator is running. Initializing system messages took 0.000 s LICENSE Information: -- Key: TIMEMILL__NSADDON -- Version: 2012.06 Installing interactive/configuration commands ... Installing commands took 0.010 s Start netlist compilation at Mon Nov 12 22:04:11 2012 Compiling "onehotFSM_K0_I50.sp" (SPICE) Compiling "/home/borowcm/libraries/saed90nm.cdl" (SPICE) Compiling "/home/borowcm/libraries/SAED90nm.lib" (SPICE) Compiling "/home/borowcm/libraries/SAED90nm.lib" (SPICE) Compiling "onehotFSM_K0_I50_stim.sp" (SPICE) Parsing netlist finished in 0 seconds Default circuit temperature : 25.000 Netlist compilation will be case insensitive. All letters will be converted to lower case. Building instance tree finished in 0 seconds Finish netlist compilation at Mon Nov 12 22:04:11 2012 Netlist compilation took 0.110 s NOTICE:Techfile Voltage (*nanosim tech="voltage") set to 1.2V ... This simulation uses HSPICE models WARNING:NanoSim:0x21104432:MISC MODEL PROBLEM: ** warning** associated with encrypted blocks were suppressed Building node/element arrays took 4.110 s Reading configuration files ... Reading configuration files took 0.000000 s WARNING:NanoSim:0x21108427:Output current waveform sampling resolution (= 1e-15 A) is smaller than the simulation current resolution (= 1e-12 A). # of CMOS elements : 448 # of resistors : 1 # of dc voltage sources : 2 # of independent sources : 3 # of current controlled current sources : 1 # of elements : 455 # of used elements : 454 # of nodes : 225 # of subckt : 342 # of top-level instances : 48 # of capacitors from netlist : 1 # of Ground CAPS from netlist : 1 # of Coupling CAPS from netlist : 0 Circuit partitioning ... Among 1 stages, there are: 0 pwl stages 0 grouped pwl stages 1 analog stages 0 NR stages 0 grouped analog stages 0 rc stages 0 ud stages 0 ADFMI functional model stages 219 nodes in the largest pwl stage 0 nodes in the largest digital stage 1 stages (1 PWL stages) with 200-249 nodes Among 225 nodes, there are: 6 pwl nodes 219 analog (accurate) nodes 0 rc nodes 0 ud nodes 0 cut nodes 0 mem_cut nodes 225 no_clamp nodes 219 nodes in stages 6 voltage source nodes 3 constant nodes 0 NR nodes Among 455 elements, there are: 451 elements in stages 3 pwl elements 24 pwl+ elements 0 synchronous elements 0 SMS elements 424 analog (accurate) elements 0 rc elements 0 ud elements 0 ADFMI functional model elements 0 VERILOGA model elements 0 behavioral model elements 451 mna elements 0 NR elements 0 mos transistors identified as keepers 448 mos transistors need Subthreshold current 0 keepers removed 0 keepers reduced Circuit partitioning took 0.000 s Constructing matrix ... Matrix ordering and construction took 0.000 s After reading configuration file(s), 1 signals are identified to be printed: 1 element branch current signals, including: 1 element branch inst. current signals Statistics of memory used for signal printing: 427688 bytes allocated in total, including: 160000 bytes allocated additionally for node current signals 267688 bytes allocated additionally for element branch current signals Levelizing stages ... Levelizing stages took 0.000 s DC initialization ... WARNING:NanoSim:0x2110e526:Element xu26.mmp1 outside tech_file range (vg=-0.436783, vd=1.2, vs=1.6)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xstate_reg[0].mmp12 outside tech_file range (vg=1.40529, vd=0.00596028, vs=1.6)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xstate_reg[0].mmn13 outside tech_file range (vg=1.40529, vd=0, vs=-0.437077)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xstate_reg[0].mmp13 outside tech_file range (vg=1.40529, vd=-0.437077, vs=1.2)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xnextstate_reg[2].mmp012 outside tech_file range (vg=-0.570887, vd=1.2, vs=1.6)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xnextstate_reg[2].mmp7 outside tech_file range (vg=0.552372, vd=-0.270347, vs=1.2)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xnextstate_reg[2].mmn011 outside tech_file range (vg=1.36736, vd=0, vs=-0.570887)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xnextstate_reg[2].mmp011 outside tech_file range (vg=1.36736, vd=-0.570887, vs=1.2)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xu27.mmp1 outside tech_file range (vg=-0.436784, vd=1.2, vs=1.6)... at 0ns WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110e526:Element xu28.mmp2 outside tech_file range (vg=-0.436783, vd=0.8054, vs=1.6)... at 0ns WARNING:NanoSim:0x20102001:Previous message has been printed 10 times, It will not be printed again! To change the limit for every message type, use: "set_mesg_opt limit_per_mesg=" WARNING:NanoSim:0x2110e5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x20102001:Previous message has been printed 10 times, It will not be printed again! To change the limit for every message type, use: "set_mesg_opt limit_per_mesg=" Finishing initialization (level 0 -- 0) 0 dynamic stages assigned in DC Initialization Number of residual dc events scheduled : 0 Number of ic nodes scheduled : 0 DC initialization took 0.040 s Simulation begins in pwl mode ... WARNING:NanoSim:0x2110f526:Element xnextstate_reg[4].mmp9 outside tech_file range (vg=0.808175, vd=-0.316737, vs=1.19992)... at 20.09ns WARNING:NanoSim:0x2110f5f7:NOTICE: tech_file range is being expanded. WARNING:NanoSim:0x2110f526:Element xnextstate_reg[4].mmp7 outside tech_file range (vg=0.808175, vd=-0.382818, vs=1.19992)... at 20.09ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xnextstate_reg[4].mmn9, vbs=0.425091... at 35.27ns WARNING:NanoSim:0x2110f525:Negative bulk-source bias: element xstate_reg[4].mmp10, vbs=-0.421899... at 40ns WARNING:NanoSim:0x2110f525:Negative bulk-source bias: element xstate_reg[4].mmp12, vbs=-0.421899... at 40ns WARNING:NanoSim:0x2110f525:Negative bulk-source bias: element xnextstate_reg[4].mmp9, vbs=-0.416606... at 40.09ns WARNING:NanoSim:0x2110f525:Negative bulk-source bias: element xstate_reg[5].mmp10, vbs=-0.431167... at 50ns WARNING:NanoSim:0x2110f525:Negative bulk-source bias: element xstate_reg[5].mmp12, vbs=-0.431167... at 50ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xstate_reg[3].mmn4, vbs=0.418064... at 55ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xstate_reg[3].mmn6, vbs=0.418064... at 55ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xu19.mmn3, vbs=0.405592... at 85.15ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xu25.mmn3, vbs=0.435705... at 105.03ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xu25.mmn2, vbs=0.435705... at 105.03ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xnextstate_reg[2].mmn9, vbs=0.551592... at 110.06ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xu22.mmn3, vbs=0.424725... at 115.03ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xu22.mmn2, vbs=0.424725... at 115.03ns WARNING:NanoSim:0x2110f524:Positive bulk-source bias: element xstate_reg[3].mmn03, vbs=0.402682... at 115.24ns WARNING:NanoSim:0x20102001:Previous message has been printed 10 times, It will not be printed again! To change the limit for every message type, use: "set_mesg_opt limit_per_mesg=" WARNING:NanoSim:0x2110f525:Negative bulk-source bias: element xstate_reg[1].mmp10, vbs=-0.422157... at 240ns WARNING:NanoSim:0x2110f525:Negative bulk-source bias: element xstate_reg[1].mmp12, vbs=-0.422157... at 240ns WARNING:NanoSim:0x2110f525:Negative bulk-source bias: element xstate_reg[0].mmp10, vbs=-0.421853... at 250ns WARNING:NanoSim:0x2110f525:Negative bulk-source bias: element xstate_reg[0].mmp12, vbs=-0.421853... at 250ns Simulation ends at 540.000 ns Simulation took 2.440 s Current information calculated over the intervals: 0.00000e+00 - 5.40010e+02 ns Simulation time resolution : 1.000e-02 ns Print time resolution : 1.000e-02 ns Number of PWL matrix solutions : 6033 Number of PWL MOS model lookups : 2601416 Number of time steps : 5941 Number of iterations : 0 Number of rejected time steps : 1899 Global simulation parameters used: SPD 0.06V ASPD 0.024V SIM_DESV 0.06V SIM_AESV 0.024V VDS_MIN 9.34266e-11V AVDS_MIN 9.34266e-11V SSC (steady state current) 1e-07uA SUBI (subthreshold current) 1e-06uA DC CURRENT 1e-06uA 7.0 real 7.2 user 0.1 sys Signal data is saved in onehotFSM_K0_I50.out No errors reported in the .err file (onehotFSM_K0_I50.err)